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Double buffered parallel to serial converter
Double buffered parallel to serial converter







double buffered parallel to serial converter

  • G06F3/0602- Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect.
  • G06F3/0656- Data buffering arrangements.
  • input-output transfer data movement between one or more hosts and one or more storage devices
  • G06F3/0655- Vertical data movement, i.e.
  • G06F3/0628- Interfaces specially adapted for storage systems making use of a particular technique.
  • G06F3/0601- Interfaces specially adapted for storage systems.
  • RAID, emulated record carriers, networked record carriers
  • G06F3/06- Digital input from or digital output to record carriers, e.g.
  • G06F3/00- Input arrangements for transferring data to be processed into a form capable of being handled by the computer Output arrangements for transferring data from processing unit to output unit, e.g.
  • 238000006011 modification reaction Methods 0.000 description 1.
  • 230000003139 buffering Effects 0.000 title abstract description 14.
  • INCORPORATED SECURITY AGREEMENT Assignors: D2AUDIO CORPORATION, ELANTEC SEMICONDUCTOR, INC., INTERSIL AMERICAS INC., INTERSIL COMMUNICATIONS, INC., INTERSIL CORPORATION, KENET, INC., PLANET ATE, INC., QUELLAN, INC., TECHWELL, INC., ZILKER LABS, INC. INCORPORATED reassignment MORGAN STANLEY & CO. STUART Priority to US10/775,614 priority patent/US7246199B2/en Publication of US20040243744A1 publication Critical patent/US20040243744A1/en Publication of US7246199B2 publication Critical patent/US7246199B2/en Application granted granted Critical Assigned to MORGAN STANLEY & CO.

    double buffered parallel to serial converter

    Assignors: PEREZ, MIGUEL GABINO, REES, THEODORE D., SMITH, D. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority to US47404303P priority Critical Application filed by Elantec Semiconductor LLC filed Critical Elantec Semiconductor LLC Assigned to ELANTEC SEMICONDUCTOR, INC. Original Assignee Elantec Semiconductor LLC Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) Rees Miguel Gabino Perez Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Expired - Fee Related, expires Application number US10/775,614 Other versions US20040243744A1

    double buffered parallel to serial converter

    #Double buffered parallel to serial converter pdf#

    Google Patents Double buffering of serial transfersĭownload PDF Info Publication number US7246199B2 US7246199B2 US10/775,614 US77561404A US7246199B2 US 7246199 B2 US7246199 B2 US 7246199B2 US 77561404 A US77561404 A US 77561404A US 7246199 B2 US7246199 B2 US 7246199B2 Authority US United States Prior art keywords data address bits driver serial Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US7246199B2 - Double buffering of serial transfers

    double buffered parallel to serial converter

    US7246199B2 - Double buffering of serial transfers









    Double buffered parallel to serial converter